(a) Field of the invention:
The present invention is related to a transistor, and in particular it pertains to a field effect transistor of the type wherein the channel is conductivity-modulated in accordance with the amount of minority carriers injected from the gate into the channel of the field effect transistor.
(b) Description of the prior art:
Field effect transistors of the type wherein the impedance between the source and the drain is controlled according to the amount of minority carriers injected from the gate into the channel located between the source and the drain have been proposed. As an example of the field effect transistors of the type described above, a junction field effect transistor of vertical type has been proposed by Jun-ichi Nishizawa. This junction field effect transistor is designed so that depletion layers extending from the gate into the channel may substantially pinch-off the channel when the gate p-n junction is zero-biased, and that the depletion layers may shrink to render the channel conductive when the gate p-n junction is forwardly biased, i.e. when sufficient amount of minority carriers are injected from the gate into the channel.
The aforementioned junction field effect transistor has many excellent features, and finds wide use in its electronic applications. However, this junction field effect transistor is accompanied by the drawback that the switching speed, particularly the turn-off speed thereof is inherently somewhat limited due to the minority carrier storage effect at the gate p-n junction.